Diploma in ECE Study Material | VERY LARGE SCALE INTEGRATION | Yuvasallinfo

Diploma in ECE Study Material | VERY LARGE SCALE INTEGRATION | Yuvasallinfo

34053-VERY LARGE SCALE INTEGRATION

Unit-1 Syllabus

1.1 COMBINATIONAL CIRCUIT DESIGN:

NMOS and CMOS logic implementation of Switch, NOT, AND, OR, NAND, and NOR Gates CMOS Transmission Gate. Digital logic variable, functions, inversion, gate/circuits, Boolean algebra and circuit synthesis using gates (Up to 4 variables).
1.2 COMBINATIONAL CIRCUIT BUILDING BLOCKS:
Circuit synthesis using Multiplexer, Demultiplexer, Encoders and Decoders, Arithmetic adder, Sub tractor and Comparator circuits. Hazards and races.

Unit -1 Important 2 Mark and 3 Mark Questions

1. Draw the Transistor level implementation of NAND Gate using CMOS logic
2. Draw the Transistor level implementation of NOR Gate using CMOS logic
3. What are the universal Gates?
4. Why NAND & NOR Gates are said to be universal gates?
5. Distinguish between combinational & sequential circuits
6. List few combinational circuits
7. Draw the circuit of Half Adder.
8. Draw the circuit of full adder.
9. What do you meant by Hazards? List the types of Hazards.
10. What are the types of races? Define Critical Race.
11. Draw the CMOS NOT gate circuit.
12. Draw the CMOS transmission gate.
13. What are the types of races? Define critical race.
14. Draw the CMOS NAND gate circuit and explain with truth table.

Unit -1 Important 10 Mark Questions

1. Implement the function with f=∑0,2,3,7 minimal gates
2. Implement the above function f=∑0,2,3,7 with 4:1 mux
3.  Implement the function with do not care conditions of 4&6 with minimal gates
4. Implement the function with minimal gates with 4:1mux
5. Implement the function f=∑{1,2,3,5,7,10,13} with minimal gates
6.  Implement the above function with 4:1mux
7.  Implement the function f=∑{1,2,3,5,7,10,13}
8.  Implement the above function with 4:1 mux
9.  Draw the circuit of NMOs, NAND, NOR, AND, OR.
10. Draw the circuit of CMOS NAND, NOR, AND, OR.

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