Diploma in ECE Study Material | VERY LARGE SCALE INTEGRATION Unit 2| Yuvasallinfo
Diploma in ECE Study Material | VERY LARGE SCALE INTEGRATION | Yuvasallinfo
4040530-VERY LARGE SCALE INTEGRATION
2.1 VHDL FOR COMBINATIONAL CIRCUIT:
Introduction to VLSI and its design process. Introduction to CAD tool and VHDL: Design Entry, Synthesis, and Simulation. Introduction to HDL and different level of abstractions. HDL Statements and Assignments
2.2 VHDL CODE:
AND, OR, NAND, NOR gates, Implementation of Mux, Demux, Encoder, decoder. Four bit Arithmetic adder, sub tractor and comparator in VHDL
Important 2 Mark and 3 Mark Questions
- Define Synthesis
- Define Timing Simulation
- Expand VHDL
- What are the different levels of abstractions?
- Define selected signal assignment.
- What are assignment statements?
- Define for Generate statement?
- Distinguish between concurrent assignment & sequential assignment & sequential assignment statement.
- List any Two VHDL operators & Explain
- Define data flow modeling.
- Write the VHDL code for OR Gate
- Write the VHDL code for AND Gate
- Write the VHDL code for NOT Gate
Important 10 Mark Questions
- Explain in detail about different levels of obstructions.
- Explain in detail about assignment statements.
- Write a VHDL Code four bit adder.
- Write a VHDL Code for four bit Comparator
- Write a VHDL Code for four bit Multiplier
- Write a VHDL Code for AND, OR , NOR Gates
- Write a VHDL Code for 4:1 mux
- Write a VHDL Code for four bit multiplier
- Write a VHDL Code for Demux
- Write a VHDL Code for mux.
